Me postulé a través de una facultad o universidad. El proceso tomó 1 semana. Acudí a una entrevista en Intel Corporation (Hillsboro, OR) en jul 2012
Entrevista
The interview lasted from 9am to 4pm, total 6 rounds with three different teams. The interview tested both HW & SW. HW includes timing & delay analysis, RTL coding, FSM design, basic gate topology and leakage, pass gates.etc. SW includes string manipulation, decimal to hex conversion&recursion. Both C & perl were used. In the end, I met with the hiring manager for a wrap up.
Preguntas de entrevista [1]
Pregunta 1
Design an FSM that can generate a single pulse after certain no. of rising clk edge. Such no. is defined by the input.
Acudí a una entrevista en Intel Corporation (Santa Clara, CA)
Entrevista
Questions on physical design concepts , syn and apr
Sta questions about constraints
Concepts of transistor physics
Phone screen, multiple round, followed by conversation with the hiring manager
Overall good experience
Acudí a una entrevista en Intel Corporation (Chandler, AZ)
Entrevista
Five engineers, a manager and director asked medium level engineering and architecture questions including proof of structured coding and design skills. Each interviewer had varying questions. They rated at 0 (won’t work with candidate), 1 (adequate) or 2 (exceptional hire) for a team survey of votes to compare multiple candidates.
Preguntas de entrevista [1]
Pregunta 1
Design a state machine to control a four way intersection of varying time traffic lights.
long but effective. 4 rounds of interviews ( quiz questions, computer architecture, past projects, leadership experience, basic algorithm questions, coding, etc.) each last 40 min. results came back after 10 days