question then small verilog round followed by a long interview where they asked for normal verilog and system verilog schemes circuit design and production process a cb dd dee eqe qe eq

Applied through university as well as recruiters. Don't know how resume reached manager. 2-3 rounds depending on manager. 1st round resume and general VLSI -- Manager 2nd round even more VLSI and some coding -- Sr. Engineer Both phone rounds.