Why NAND gate realization is preferred in digital design even though we can design complete circuitry using NOR gate also? Why we study sinusoidal response of a system however we know actual input to a system may be any signal? Why we need active filters even though we can design filters by using passive components only ? Why PMOS is used as Pull up network and NMOS is used as pull down network in CMOS logic implementation. Why Minority charge carriers available at the edge of depletion layer contributes in reverse current effectively and other charge carriers are ineffective?? Why slope=-1 point is considered for Noise Margin calculations in CMOS?? What is Barkhausen criteria for oscillaton Why Astable Multivibrator is called Square Wave Generator and why not Schmitt trigger ?

One of the most common question was like this was asked in all 4 rounds was about CMOS Inverter Characteristics and deep diving into the concepts from there and RC,RL,RLC and LC circuits