1. Introductio, strength and weakness, beech project 2. Question related to btech project 3. Python, C many languages are there then why verilog and what is verilog basically used for? 4. Verilog diminish other language, comment on it 5. Design mod 5 using verilog 6. Design Xnor using 2:1 Mux 7. How you are team player, explain 8. Write verilog code for xnor circuit By operator and by muxes -----------------Next person---------------------- 8. Design Circuit for frequency divider 9. Mod 9 counter design by verilog Here counter trigger by pulse 10. Sram 11. Sta, what is max frequency in frequency divider--explained then he asked why not consider hold? 12. What are timing parameters in a FF?