How to turn a MUX into an AND gate?

Question

LGS · Accepted Answer

Multiple ways to do this with a 2-input mux:
1) ctlr signal: A, input 0: 0, input 1: B
2) ctlr signal: A, input 0: A, input 1: B
3) ctlr signal: B, input 0: 0, input 1: A
4) ctlr signal: B, input 0: B, input 1: A

bestzyg · Answer

if out = sel?A:B  => out = !(!(B AND !sel) AND !(A AND sel)）

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